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Vol ||1|| Issue || 9 ||


1.Full Citation
Manuscript Id :: 13086
Manuscript Type :: Research
Manuscript Title :: Design of Compliant Passive Digital Block of Read-Only RFID Tag
Country :: Ghaziabad (U.P) India
Authors :: R. N. Baral||Jagdeep Singh
Pages No. :: 01-07
Paper Index :: :07.4721/0190107
Full PDF ::
Abstract
In recent years, low cost RFID is increasingly becoming popular. Tags of such an RFID system consists of less complex architecture, thereby minimizing the power consumption and cost will be less.The work incorporates ISO 14443 regulations for designing the digital block of tag. It utilizes 13.56 MHz carrier frequency which is available worldwide as an ISM (Industrial-Scientific-Medical) frequency. To reduce complexity, the tag is made passive with the only available power source as inductively coupled electromagnetic field of the reader. For further simplicity, a read-only tag has been designed which just reveals its identity to the reader. The tag architecture is divided into two parts: analog and digital blocks. The components of analog block have been designed to reduce the leakage power. Asynchronous logic has been used in digital block to minimize the clock activity and hence cause a reduction in transient power.We have used Type A specifications of ISO 14443 for digital block of RFID tag. This gives the Interrogation field strength Hmin of the reader as 7.5 A/m. From the values of tag dimensions (85.72mm × 54.03 mm × 0.76mm), carrier frequency (13.56 MHz) and no. of antenna turns (N=4), we get the min. rms value of voltage available to the tag U2 as 2.581V. A Low dropout regulator supplies the voltages for the digital block. The digital block utilizes an asynchronous counter to derive their timing and processing signals. 128 bit ROM stores an EPC (Electronic Product Code) which is fetched, processed and sent back to the reader via decoder, multiplexer and modulator units. As specified in ISO 14443 Type A, the modulation type is 10% ASK with the data rate as 106 kbps.The entire deign has been simulated with an input power source of 600μW. The digital circuitry is implemented on 1V rail to rail voltage to reduce the power consumption. The digital schematic has been simulated on 0.18μm CMOS technology Level 53 models from TSMC and Mentor Graphics EDA tool suite.

Key words:  Asynchronous counter, Decoder, Multiplexer, ROM and Modulator.
Reference
[1] R. Want, ―An Introduction To Rfid Technology,‖ Pervasive Computing, January – March 2006.
[2] Rfid Explained,‖ Free Idtechex White Paper, Idtechex Limited, 2002.
[3] K. Finkelzeller, The Rfid Handbook, 2nd Ed., John Wiley & Sons, 2003.
[4] Y. Lee, ―Antenna Circuit Design For Rfid Applications‖, Microchip Technology Inc., 2003.
[5] Z. Zhu, B. Jamali And P. H. Cole, ―Brief Comparison Of Different Rectifier Structures For Rfid Transponders‖, Auto-Id Lab At University Of Adelaide, 2005.
[6] U. Kaiser, W.Steinhagen, ―A Low Power Transponder Ic For High Performance Identification Systems‖, Ieee J. Solid-State Circuits, Vol. 30, No. 3, Pp. 306 – 310, March 1995.
[7] R. J. Baker, H. W. Li And D.E. Boyce, ―Cmos Circuit Design, Layout, And Simulation‖, Ieee Press, 1998.

2.Full Citation
Manuscript Id :: 14020
Manuscript Type :: Research
Manuscript Title :: Simultaneous Extraction of Copper and Iron from Chalcopyrite Concentrates in Hydrochloric Acid Media: Effect of Additives and Temperature
Country :: Jharkhand, India
Authors :: Sampad Ghosh||Balram Ambade||Shailesh Kumar Prasad||Anand K. Choudhary
Pages No. :: 08-13
Paper Index :: :07.4721/01908013
Full PDF ::
Abstract
Studies on the chlorination of a chalcopyrite concentrate in aqueous slurry by gaseous chlorine have been demonstrated in this investigation. The effect of time, acid concentration, pulp density (PD) of the sulphide concentrate, effect of sodium chloride on dissolution of copper and the temperature of chlorination, on the fraction of copper dissolved, has been investigated. At the optimum flow rate of Cl2 gas (400 mL min-1), the percent of copper dissolved is found to be increasing with increase in acid concentration, temperature in the range of 318K to 333K and also increasing with decrease with pulp density, addition of sodium chloride, studied. The activation energy of the chlorination process has been calculated to be 7.26 kJ mol-1. The best fit of kinetic data to a diffusion-controlled model indicated that diffusion through the product layer was the rate-controlling step during the dissolution. At 333K, with 10wt% concentrate in the slurry and using pure Cl2 gas with a flow rate of 400 ml/min, nearly 93% of copper extraction has been achieved in about 1 hr. The mechanism of the leaching was further established by characterising the original concentrate and the leach residue by XRD phase identification studies.

Keywords –   Chalcopyrite concentrate, Chlorine leaching, Dissolution, Hydrochloric acid, and Copper, Iron.
Reference
1. (a) Prasad, S.; Pandey, B.D. Minerals Engineering 1998, 11, 763-781 (b) Nahar, N.M. Renewable Energy 2002, 26(4), 623-635.
2. (a) Rabaey, K.; Clauwaert, P.; Aelterman, P.; Verstraete, W. Environ. Sci. Technol. 2005, 39, 8077-8082. (b) Lu, Z.Y.; Jeffrey, M.I.; Lawson, F. Hydrometallurgy 2000, 56, 189-202.
3. Havlik, T.; Laubertova, M.; Miskufova, A.; Kondas, J.; Vranka, F. Hydrometallurgy 2005, 77, 51-59. 4. Velásquez-Yévenes, L.; Nicol, M.; Miki, H. Hydrometallurgy 2010, 103, 108-113.
5. Pandey, A.M.; Gupta, K.N.; Altekar, V.A. Hydrometallurgy 1982, 9, 57-68.
6. Acero, P.; Cama, J.; Ayora, C.; Asta, M.P. Geologica Acta. 2009, 7(3), 389-397.
7. Owusu, G.; Dresinger, D.B. Hydrometallurgy 1995, 38, 315-324.
8. Babu, M.N.; Sahu, K.K.; Pandey, B.D. Hydrometallurgy 2002, 64, 119-129.
9. Ting-sheng, Q.; Guang-hua, N.; Jun-feng, W.; Li-feng, C. Trans. Nonferrous Met. Soc. China 2007, 17, 418-422.
10. Balaz, P.; Ebert, I. Hydrometallurgy 1991, 27, 141-150.

3.Full Citation
Manuscript Id :: 14029
Manuscript Type :: Research
Manuscript Title :: Influence of Arithmetical Ability and Study Habit on the Achievement in Mathematics at Secondary Stage
Country :: Guwahati, Assam,INDIA
Authors :: Dr. Ranjana Choudhury||Dhiraj kumar Das
Pages No. :: 14-18
Paper Index :: :07.4721/019014018
Full PDF ::
Abstract
Arithmetical ability and study habits are some of the factor that influences the student's achievement in mathematics. The present study aims at studying the influence of areas in relation to the arithmetic ability and study habit on the achievement in mathematics to the pupils' at secondary stage. A sample of 500 students of standard IX from secondary school of south kamrup district, Assam, participated in the present study, in which the relationship among the achievement in mathematics was most closely related with arithmetical ability and study habit. Analysis of data indicated that there is a significant difference on achievement in mathematics of the students in case of sex for different sub categories but independent for the sub-categories of medium. The regression equation thus obtained shows that arithmetic ability and study habit contributes 28.44% and 29.66% respectively to the Achievement in mathematics.

Key words:   Arithmetic Ability, Study Habit, Achievement in Mathematics, Sex, Medium.
Reference

[1]. National policy of Education. (1986) Government of India Document. New Delhi, Ministry Of Human Resourse Development
[2]. Pauk.W(1962)How to study in College.Bostoni AoughtonMifflin Company
[3]. Deese.J.(1959) Environmental effect on study habits and attainment .Reading Research Quarterly. Vol.1.,No 3., 37-42
[4]. Akinboye. J.O (1980) How to study ; A psychological approach Ibadan, Maritime Printers.
[5]. Rastogi.S (1983)"Diagnosis of weakness in Arithmetic as related to the Basic arithmetic skills and their remedial measures" Ph.D. Thesis, Gauhati university, 1983.
[6]. Sumangala. V. 1995. Some psychological variables discriminating between high and low achievers in mathematics. Experiments in education, 23 (10 and 11) 165-175
[7]. Yahaya.L.A (2003).Relationship between study habit and attitude of secondary school students towards examination malpractice in kwara state. Abuja Iournal of Education.15 (1), 216-234.
[8]. Ghose, B.N.: "Scientific Method & Social Research." Sterling Publishers Pvt. Ltd.
[9]. John, W. Best, Fames. V.Khan: Research in Education "Fifth Edition."
[10]. Oyedeji,O.A.(1991) : " Perseverance, Study habit and self concept as predictors of students‟ performance in secondary school mathematics in Nigeria."
[11]. Sherard.W.H.(1981) Why a Geometry a Basic Skill?. Mathematics Teacher. 19-21.
[12]. Sirohi, V.: "A study of underachievement in relation to study habits and attitude."


4.Full Citation
Manuscript Id :: 14023
Manuscript Type :: Research
Manuscript Title :: Effect of Pulse On/Pulse Off Time On Machining Of AISI D3 Die Steel Using Copper And Brass Electrode In EDM
Country :: FerozePur
Authors :: Harpreet Singh|| Amandeep Singh
Pages No. :: 19-22
Paper Index :: :07.4721/019019022
Full PDF ::
Abstract
Electric discharge machining is non conventional machining process. EDM is generally used for machining for those materials which are cannot processed by conventional machining process. In this article we compared the material removal rate achieved using different tool materials. Workpiece used is AISI D3 and tool materials used copper and brass electrode with pulse on/pulse off as parameter. The electrolyte used is kerosene oil.

Keywords:   EDM, pulse on/off, surface finish, Wear
Reference

[1]. Singh, R., Singh B., Singh, H., 2010. Experimental Investigation for Tool Life Enhancement using Cryogenic Treatment. J. Eng. Sci. Tech. 4, 1-4.
[2]. Kiyak, M., Cakir, O., 2007. Examination of machining parameters on surface roughness in EDM of tool steel. J. Mater. Process. Technol. 191, 141-144.
[3]. Pandey, P.C and Shan., (2004). H.S Modern Machining Processes. Tata McGraw-Hill, New Delhi
[4]. Luis, C.J., Puertas, I., Villa, G., (2005). Material removal rate and electrode wear study on the EDM of silicon carbide. J. Mater. Process. Technol. 164-165, 889-896.
[5]. Lee, H.T., Tai, T.Y., 2003. Relationship between EDM parameters and surface crack formation. J. Mater. Process. Technol. 142, 676-683
[6]. Kumar, S., Choudhury, S.K., 2007. Prediction of wear and surface roughness in electro-discharge diamond grinding. J. Mater. Process. Technol. 191, 206-209.
[7]. Saha, S. K., Choudhury, S.K., 2009. Experimental investigation and empirical modelling of the dry electric discharge machining process. Int. J. Mach. Tools. Manuf. 49, 297-308.
[8]. Kumar, S., Choudhury, S.K., 2007. Prediction of wear and surface roughness in electro-discharge diamond grinding. J. Mater. Process. Technol. 191, 206-209.

5.Full Citation
Manuscript Id :: 14024
Manuscript Type :: Research
Manuscript Title :: Design of 16-QAM Transmitter and Receiver: Review of Methods of Implementation in FPGA
Country :: Brahmapur, India
Authors :: Raghunandan Swain||Ajit Kumar Panda
Pages No. :: 23-27
Paper Index :: :07.4721/019023027
Full PDF ::
Abstract
FPGAs provide magnificent speed of operation of sophisticated algorithms at sample rates of hundreds of MHz. This kind of processing power makes it possible to use FPGAs for implementing not only conventional baseband functionality but also high-speed signal processing. This paper is a demonstration of complete system generator based design of 16-QAM transmitter which can be easily implemented in FPGA as compared to the existing models. This modulation scheme is used in many communication standards such a s IEEE802.11a, IEEE 802.16d and DVB-S2. The existing architectures of both QAM transmitter and receiver consider the real time design issues like symbol mapping, source encoding, IF up-conversion, channel coding, IF down-conversion, Receiver decoding, carrier & phase recovery, timing synchronization and most importantly equalization. But unfortunately none of them suggest a complete architecture taking all the design issues into account. However this paper summarizes the advantages and disadvantages of all the architectures suggested so far and aims to have a complete system generator based transmitter model which can be practically implemented in FPGA.

Keywords -   16-QAM, Symbol Mapping, Interpolation, up conversion, down conversion, FPGA design
Reference

[1]. X. Li, Simulink-based simulation of quadrature amplitude modulation (QAM) system, Proceedings of the IAJC-IJME International Conference ISBN 978-1-60643-379-9, 2008.
[2]. C.H. Dick, F.J. Harris, M. Rice, FPGA implementation of carrier synchronization for QAM receivers, Journal of VLSI Signal Processing, Vol 36, pp.57–71, 2004.
[3]. F.J. Harris and C.H. Dick, On structure and Implementation of algorithms for carrier and symbol synchronization in software defined radios, EUSIPCO-2000, Efficient Algorithms for Hardware Implementation of DSP Systems, Tempere, Finland, 5–8 Sept. 2000.
[4]. J.E. Volder, The CORDIC trigonometric computing technique, IRE Trans. on Electronic Computers, vol. 8, no. 3, 1959,pp. 330–334.
[5]. C.H. Dick and H.M. Pedersen, Design and implementation of high-performance FPGA signal processing data paths for software defined radio, Xilinx, INC
[6]. System generator demo models, Xilinx user guide
[7]. H. Tarn, et al, Designing efficient wireless digital up and down converters leveraging CORE generator and system generator, Xilinx® Application Note, XAPP1018.
[8]. S. Creaney and I. Costarnov, Designing efficient digital up and down converters for narrowband systems, Xilinx® Application Note, XAPP1113.
[9]. N. Lall, FPGA-based wireless system design, Xilinx, INC.
[10]. M.S. Naghmash, et al, FPGA Implementation of software defined radio model based 16QAM, European Journal of Scientific Research ISSN 1450–216X Vol.35 No.2, pp. 301–310, 2009.
[11]. X. Thang Vu, N. Anh Duc, T. Anh Vu, 16-QAM transmitter and receiver design based on FPGA, Proceedings of 2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications, p 95–98, 2010.


6.Full Citation
Manuscript Id :: 14028
Manuscript Type :: Research
Manuscript Title :: SYSTEM ON CHIP (SOC) ARCHITECTURE IN INDUSTRIAL CONTROL SYSTEM OF HYDRAULIC DAMPER TEST BENCH USING Labview
Country :: Jamshedpur - India
Authors :: Hare Ram Jha||Akash Priyadarshi
Pages No. :: 28-32
Paper Index :: :07.4721/019028032
Full PDF ::
Abstract
The paper presents the universal electronic module used in Industrial Control System (ICS) based on System on Chip (SOC) architecture. It mainly deals with the software and hardware design of chip along with its implementation in hydraulic damper test benches. The paper mainly focuses on the use of a 32-bit RISC micro-controller to test the new or repaired pumps or valves with the help of virtual instrument technology software. The paper also contains the proposed results and observations made for test bench in LabVIEW with the help of PID algorithm.A best design of system on chip architecture is done with minimizing the number of electronic components on same Printed Circuit Board (PCB). Thus, the paper basically emphasizes on the use of different hardware and software components used in chip making and interfacing with a number of required peripherals.

Keywords –  Industrial control system, SOC, Hydraulic damper test bench, LabVIEW, PID algorithm
.
Reference

[1]. Drumea, Al. Vasile, P. Svasta, M. Blejan, System on Chip Signal Conditioner for LVDT Sensors, 1st Electronics Systemintegration Technology Conference ESTC06, Dresden, Germany, September 2006, pp. 629-633.
[2]. Drumea, Al. Vasile, P. Svasta, I. Ilie System on Chip Signal Conditioner for LVDT Sensors, 2nd Electronics Systemintegration Technology Conference ESTC08, September 2008
[3]. W. Guimei,et al., "Mine Pump Comprehensive Performance Testing System Based on Labview," In Measuring Technology and Mechatronics Automation ,2009.ICMTMA'09,International Conference on 2009,pp.300-303
[4]. G. Beitao, et al., "Application of LabVIEW for Hydraulic Automatic Test System," in Industrial and Information Systems ,2009.IIS '09.International Conference on,2009,pp.348-351
Books:
[5]. Embedded control handbook - Volume 1, MicrochipInc., 1997.
[6]. K. Astrom, B. Wittenmark, Computer – Controlled Systems. Theory and Design, 3rd Edition,Prentice Hall ,1997,pp.324-369.
[7]. L. Bierl, Das grosse MSP430 Praxis Buch, Franzis, 2004, pp. 110-190.
[8]. J. Travis and J. Kring, "LabVIEW for Everyone: GraphicalProgramming Made Easy and Fun," 2006.
[9]. National Instrument's PID Control Toolset User Manual.


7.Full Citation
Manuscript Id :: 14030
Manuscript Type :: Research
Manuscript Title :: Modelling of RSVP Protocol using Coloured Petri Net
Country :: Ghaziabad ,India
Authors :: Veena Bharti||Sachin Kumar
Pages No. :: 33-38
Paper Index :: :07.4721/019033038
Full PDF ::
Abstract

The main formal technique used for RSVP specification and verification is CPNs. In this paper, their functionality is described briefly by using RSVP without giving any formal definitions. The paper gives an informal introduction to the components, dynamic behaviour, occurrence and enabling mechanism of RSVP using CPNs.

Key Words:   CPN, RSVP, service specification.

Reference

[1] ISO/IEC, Information Technology-Open Systems Interconnection- Guidelines for the application of Estelle, LOTOS and SDL. TR 10167:1991, ISO/IEC, 1991.
[2] Jensen K. Coloured Petri Nets: Basic Concepts, Analysis Methods and Practical Use. Springer-Verlag, 2nd edition, Vol. 1, April, 1997.
[3] Jensen K. Coloured Petri Nets: Basic Concepts, Analysis Methods and Practical Use. Springer-Verlag, 2nd edition, Vol. 2, April, 1997.
[4] Jensen K. Coloured Petri Nets: Basic Concepts, Analysis Methods and Practical Use. Springer-Verlag, Vol. 3, April, 1997.
[5] Jensen K. (Ed). Special Section on Coloured Petri Nets, International Journal on Software Tools for Technology Transfer, Springer, 1998.
[6] Jezic G. Formal Specification and Verification of the Multiparty Call in ATM UNI Protocol. ConTEL 2009. Proceedings of the International Conference on Telecommunications and 2nd Broadband and Multimedia Workshop, University of Zagreb, Croatia, pp 307-314.
[7] Kelly D. Automata and Formal Languages: An Introduction. Prentice Hall, 2005.
[8] Kim Y. and Kim D. Construction and Performance Measurement of the RSVP Local Network. Proceedings of 1999 Internet Workshop (IWS99), IEEE, Osaka-Japan, February, 1999, pp 126-130.
[9] Kristensen L.M., Christensen S., and Jensen K. The Practitioner's Guide to Coloured Petri Nets. International Journal on Software Tools for Technology Transfer, Springer, 1998, Vol. 2, No 2, pp 98-132.
[10] Koustsofios E. and North S. Drawing Graphs with Dot. AT&T Labs-Research. March, 1999.

8.Full Citation
Manuscript Id :: 14039
Manuscript Type :: Research
Manuscript Title :: A Novel Approach for Image Retrieval Using Wavelet Transform and Hierarchical Neural Network
Country :: India
Authors :: Pankaj paroha
Pages No. :: 39-45
Paper Index :: :07.4721/019039045
Full PDF ::
Abstract

The From last few decades Image retrieval is growing as an active research area because Image retrieval is related to various other research field and domains such as Image processing, computer vision, Human computer Interaction (HCI), Database, Statics, Pattern recognition and Artificial intelligence. But this multidisciplinary area was always restricted by some limited resources as it requires large storage area and high processing power. Due to information explosion on the internet the data available today on the internet is not in the form of traditional documents but nowadays the internet database has also seen a significant rise in the multimedia databases like images, video and audio. The efficient access to this information depends upon the efficient retrieval of this data. Hence image retrieval has been the area of active research in the past few decades.This paper involves retrieving images from large databases of images which are visually similar to a query image. Now days image database increasing day by day, and it's very useful in a various applications, therefore need for the development of CBIR arose. The main objective for this thesis work is to develop a Content base image retrieval system with an innovative approach to use wavelet transformation, F-norm theory, artificial neural networks and classification techniques to retrieve similar images to the input image. The purpose of this project work is to show my research and the solution to the design of the Image retrieval system. This report summarizes the problem, proposed solution, and the desired results. This system is based on the wavelet transform, uses artificial neural networks, and similarity matching after classification.In this system user give query as an image then wavelet transform of image used to calculate the features of the image, four layers feed forward artificial neural network is used to train the system and classify the training dataset using supervised training approach. After that use similarity matching to generate the rank of the retrieves images, on the instructions similar images to query image from image database. The similarity matching is used to improve the efficiency and accuracy of the system while neural network and classification techniques are used to reduce the time complexity of the system.

Key Words:   Content based Image Retrieval, Wavelet, Artificial Neural Network, F-norm Theory.

Reference

[1] S. M. Lew. Next-Generation Web Searches for Visual Content, Computer, Information Retrieval, Volume 33,Number 11, Computer Society IEEE, 46-53. 2000.
[2] A. Del Bimbo. VisualInformation Retrieval, MorganKaufmann Publishers. 1999.
[3] P. McGuire and G. M. T. D`Eleuterio. Eigenpaxels and a Neural-Network Approach to Image Classification,IEEE Trans. onNeural Networks, 12-3. 2001.
[4] A. E. Gasca and A. R. Barandela. Algoritmos deaprendizaje y técnicas estadísticas para elentrenamiento del Perceptrón Multicapa, IV SimposioIberoamericano de Reconocimiento de Patrones, Cuba, 456-464. 1999.
[5] S. Zhang and E. Salari. Image denoising using a neuralnetwork based on non-linear filter in wavelet domain,IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, 2:989-992. 2005.
[6] N. S. Manish, M. Bodruzzaman and M. J. Malkani.Feature Extraction using Wavelet Transform forNeural Network based Image Classification, IEEE Thirtieth Southeastern Symposium on System Theory, 1:412-416. 1998.
[7] J. Puzicha, Th. Hofmann and J. M. Buhmann. Histogram Clustering for Unsupervised Segmentation and Image Retrieval, Pattern Recognition Letters, 20: 899-909. 1999.
[8] M. K. Mandal and T. Aboulnasr. Fast Wavelets Histogram Techniques for Image Indexing, Computer Vision and Understanding, 75-1-2:99-110. 1999.
[9] S. Liapis and G. Tziritas. Color and texture image retrieval using chromaticity histograms and wavelet frames, IEEE Trans. on Multimedia, 5:676–686. 2004.
[10] E. Mathias and A. Conci. Comparing the Influence of Color Spaces and Metrics in Content-Based Image Retrieval, Anais do X SIBGRAPI (10):1-8. 1988.
[11] Q. Iqbal and J. K. Aggarwal, CIRES: A System for Content-based Retrieval in Digital Image Libraries, Seventh International Conference on Control, Automation, Robotics and Vision (ICARCV) 1:205- 210. 2002. Eight International Workshop on Image Analysis for Multimedia Interactive Services(WIAMIS'07)


9.Full Citation
Manuscript Id :: 12012
Manuscript Type :: Research
Manuscript Title :: Digitally Controlled Current-Mode Dc–Dc Converter Ic
Country :: Chennai, India
Authors :: Murali Munraj
Pages No. :: 46-52
Paper Index :: :07.4721/019046052
Full PDF ::
Abstract

The main focus of this paper is the implementation of mixed-signal peak current mode control in low-power dc–dc converters for portable applications. A DAC is used to link the digital voltage loop compensator to the analog peak current mode loop. Conventional DAC architectures, such as flash or are not suitable due to excessive power consumption and limited bandwidth of the reconstruction filter, respectively. The charge-pump based DAC (CP-DAC) used in this work has relatively poor linearity compared to more expensive DAC topologies; however, this can be tolerated since the linearity has a minor effect on the converter dynamics as long as the limit-cycle conditions are met. The CP-DAC has a guaranteed monotonic behavior from the digital current command to the peak inductor current, which is essential for maintaining stability. A buck converter IC, which was fabricated in a 0.18 m CMOS process with 5 V compatible transistors, achieves response time of 4 s at for a 200 mA load-step. The active area of the controller is only 0.077 mm and the total controller current-draw, which is heavily dominated by the on-chip senseFET current-sensor, is below 250 A for a load current of 50mA.

Key Words:   CPM, current-mode, dc–dc converter, digital con- trol, integrated circuits, power management, SMPS, voltage regu- lators.

Reference

[1] M. Alimadadi, S. Sheikhaei, G. Lemieux, S. Mirabbasi, and P. Palmer, "A 3 GHz switching DC–DC converter using clock-tree charge recy- cling in 90 nm CMOS with integrated output filter," in Proc. IEEE Int. Solid-State Circuits Conf., 2007, pp. 532–533.
[2] Z. Hayashi, Y. Katayama, M. Edo, and H. Nishio, "High efficiency dc–dc converter chip size module with integrated soft ferrite," IEEE Trans. Magn., vol. 39, no. 5, pp. 3068–3072, Sep. 2003.
[3] MIC3385: 8 mhz Inductorless Buck Regulator With LDO Standby
Mode Datasheet, micrel, 2007 [Online]. Available: http://www.mi- crel.com
[4] Ep5352q/ep5362q/ep5382q-500/600/800 ma Synchronous Buck Reg- ulators With Integrated Inductor Datasheet, Enpirion, 2006 [Online]. Available: http://www.enpirion.com
[5] R. Erickson and D. Maksimovic´, Fundamentals of Power Elec- tronics. Norwell, MA: Kluwer, 2001.
[6] C. Lee and P. Mok, "A monolithic current-mode CMOS DC–DC
converter with on-chip current-sensing technique," IEEE J. Solid-State
Circuits, vol. 39, no. 1, pp. 3–14, 2004.
[7] H. Forghani-Zadeh and G. Rincon-Mora, "An accurate, continuous, and lossless self-learning CMOS current-sensing scheme for
inductor- based DC–DC converters," IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 665–679, Mar. 2007.
[8] M. Du and H. Lee, "A 2.5 MHz, 97%-accuracy on-chip current sensor with dynamically-biased shunt feedback for current-mode switching DC–DC converters," in Proc. IEEE Int. Symp. Circuits Syst., 2008, pp.
3274–3277.
[9] Y. Ahn, H. Nam, and J. Roh, "A 93.5% efficiency, 400-ma current- mode DC–DC buck converter with watchdog functions," in Proc. Int.
SoC Design Conf. (ISOCC), Nov. 2009, pp. 428–431.
[10] S. Saggini and M. Ghioni, "An innovative digital control architecture for low-voltage high-current DC–DC converters with tight load regu-
lation," IEEE Trans. Power Electron., vol. 19, no. 1, pp. 210–218, Jan.
2004.


10.Full Citation
Manuscript Id :: 13011
Manuscript Type :: Research
Manuscript Title :: Evaluation of Manufacturers' Quality of Work based on EFQM (Case Study:Mega Motor Co.)
Country :: Tehran,Iran
Authors :: Mahdi Kheyrkhahan||Pegah Aliabadi||Pooria Barahimi
Pages No. :: 53-60
Paper Index :: :07.4721/019053060
Full PDF ::
Abstract

ganizational Improvement Model, is one of the most significant organizational superiority as well as self-assessment which is located based on accessibility of such a model. This model has been found as one of the most powerful and efficient means of assessment as well as improvement in functionality of each system. In this research, on the one hand, the weighing framework standard has been taken into account and on the other hand, domesticating the model by means of providing necessary questions in order to study all sub-standards have been achieved. Furthermore, we have had 300 providers out of random sampling and finally they ended up narrowing the number to only two candidates and while utilizing those random questions ,a thorough comparison had been conducted.This research, according to the result of the questions given to those two above-mentioned providers and recording all the findings, and with the use of SPSS those charts have been drawn in order to find the positive impact of implementing the EFQM model on the quality and constant improvement of the other companies and achieve all the prospective results.

Key Words:   EFQM , quality Management , Functional Quality Assessment, Categorization of Providers.

Reference

[1] Abdi Farshid & Karbasiyazdi Amir,2011, EFQM Domesticated Model for Organizations
[2] Abdolrashidi Neda & Firoziyan Mahmod ,2009, Recognizing the effective Indices related to Industrial Projects Emphasizing on EFQM and BSC
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